Categories
Latest Products
Bus Blaster v3
- Product SKU: SS_102990047
- Category: Development Platform, For Android, Tools
Based on FT2232H with high-speed USB 2.0
Buffered interface works with 3.3volt to 1.8volt targets
Reprogrammable buffer is compatible with multiple debugger types
Compatible with jtagkey, KT-link programmer settings in OpenOCD, urJTAG, and more ships with JTAGkey compatible buffer image pre-programmed
Should support Serial Wire Debug when available
Mini-CPLD development board: self programmable, extra CPLD pins to header
Open source (CC-BY-SA)
Bus Blaster Manual
Bus Blaster design overview
Bus Blaster forum
CPLD buffer logic overview
Fitted in a DP8049 (80x49 mm) standard PCB, case available here
Added series resistors to input and output pins to protect against damage and noise
Swapped FT2232 clock output to CPLD pin with global clock feature for potential logic analyzer mode
This open source hardware and software is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Techsupport
This product is designed by Dangerous, If you encounter any problems when using this product, please request technical support in the forum.
Technical details
Dimensions 80mm x120mm x12.5mm
Weight G.W 21g
Battery Exclude
Based on FT2232H with high-speed USB 2.0
Buffered interface works with 3.3volt to 1.8volt targets
Reprogrammable buffer is compatible with multiple debugger types
Compatible with jtagkey, KT-link programmer settings in OpenOCD, urJTAG, and more ships with JTAGkey compatible buffer image pre-programmed
Should support Serial Wire Debug when available
Mini-CPLD development board: self programmable, extra CPLD pins to header
Open source (CC-BY-SA)
Bus Blaster Manual
Bus Blaster design overview
Bus Blaster forum
CPLD buffer logic overview
Fitted in a DP8049 (80x49 mm) standard PCB, case available here
Added series resistors to input and output pins to protect against damage and noise
Swapped FT2232 clock output to CPLD pin with global clock feature for potential logic analyzer mode
This open source hardware and software is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Techsupport
This product is designed by Dangerous, If you encounter any problems when using this product, please request technical support in the forum.
Technical details
Dimensions 80mm x120mm x12.5mm
Weight G.W 21g
Battery Exclude
RETURNS POLICY
Lorem ipsum dolor sit amet, consectetur adipiscing elit. Morbi ut blandit risus. Donec mollis nec tellus et rutrum. Orci varius natoque penatibus et magnis dis parturient montes, nascetur ridiculus mus. Ut consequat quam a purus faucibus scelerisque. Mauris ac dui ante. Pellentesque congue porttitor tempus. Donec sodales dapibus urna sed dictum. Duis congue posuere libero, a aliquam est porta quis.
Donec ullamcorper magna enim, vitae fermentum turpis elementum quis. Interdum et malesuada fames ac ante ipsum primis in faucibus.
Curabitur vel sem mi. Proin in lobortis ipsum. Aliquam rutrum tempor ex ac rutrum. Maecenas nunc nulla, placerat at eleifend in, viverra etos sem. Nam sagittis lacus metus, dignissim blandit magna euismod eget. Suspendisse a nisl lacus. Phasellus eget augue tincidunt, sollicitudin lectus sed, convallis desto. Pellentesque vitae dui lacinia, venenatis erat sit amet, fringilla felis. Nullam maximus nisi nec mi facilisis.
SHIPPING
Lorem ipsum dolor sit amet, consectetur adipiscing elit. Morbi ut blandit risus. Donec mollis nec tellus et rutrum. Orci varius natoque penatibus et magnis dis parturient montes, nascetur ridiculus mus. Ut consequat quam a purus faucibus scelerisque. Mauris ac dui ante. Pellentesque congue porttitor tempus. Donec sodales dapibus urna sed dictum. Duis congue posuere libero, a aliquam est porta quis.
Donec ullamcorper magna enim, vitae fermentum turpis elementum quis. Interdum et malesuada fames ac ante ipsum primis in faucibus.
Curabitur vel sem mi. Proin in lobortis ipsum. Aliquam rutrum tempor ex ac rutrum. Maecenas nunc nulla, placerat at eleifend in, viverra etos sem. Nam sagittis lacus metus, dignissim blandit magna euismod eget. Suspendisse a nisl lacus. Phasellus eget augue tincidunt, sollicitudin lectus sed, convallis desto. Pellentesque vitae dui lacinia, venenatis erat sit amet, fringilla felis. Nullam maximus nisi nec mi facilisis.
